A liquid crystal display device has been used in various information display terminals such as view finders for video camera, a display of a compact television set and a spatial light modulator of a high-resolution projection television set and the like.
The major operating system for the liquid crystal display device is the twisted nematic ("TN") and the super twisted nematic ("STN"). Though they are presently commercially used in the market, the characteristics of narrow viewing angle are still remained unsolved.
An In-Plane Switching ("IPS") mode liquid crystal display has been suggested to solve foregoing problem.
As described in FIG. 1, a plurality of gate bus lines 11 are formed on a lower insulating substrate 10 along an x direction shown in the drawings and the gate bus lines 11 are parallel to each other. A plurality of data bus lines 15 are formed along an y direction which is substantively perpendicular to the x direction. Therefore a sub pixel region is defined. At this time, a pair of gate bus line 11 and a pair of data bus line 15 are formed for defining the sub pixel region. The gate bus line 11 and the data bus line 15 are insulated by a gate insulating layer (not shown).
A counter electrode 12 is formed, for example in a rectangular frame shape, within a sub pixel region and it is disposed at the same plane with the gate bus line 11.
A pixel electrode 14 is formed at each sub pixel region where the counter electrode 12 is formed. The pixel electrode 14 is composed of a web region 14a which divides the region surrounded by the rectangular frame type counter electrode 12 with a y direction, a first flange region 14b connected to a portion of the web region 14a and simultaneously overlapped with the counter electrode 12 of the x direction, and a second flange region 14c which is parallel to the first flange region 14c and is connected to the other portion of the web region 14a. That is to say, the pixel electrode 14 seems the letter "I". Here, the pixel electrode 14 and the counter electrode 12 are insulated from each other by a gate insulating layer (not shown).
A thin film transistor 16 (hereinafter "TFT") is disposed at the intersection of the gate bus line 11 and the data bus line 12. This TFT 16 is composed of a gate electrode being extended from the gate bus line 11, a drain electrode being extended from the data bus line 15, a source electrode being extended from the pixel electrode 14 and a channel layer 17 formed on upper of the gate electrode.
A storage capacitor (Cst) is disposed at the region where the counter electrode 12 and the pixel electrode 14 are overlapped.
Though not shown in FIG. 1, an upper substrate(not shown) equipped with a color filter (not shown) and a lower substrate 10 are oppositely disposed with predetermined distance. Further a liquid crystal layer (not shown) having a plurality of liquid crystal molecules (hereinafter "LC molecules") is interposed between the upper substrate (not shown) and the lower substrate 10.
Also, onto the resultant structure of the lower substrate and onto an inner surface of the upper substrate are formed homogeneous alignment layers respectively. By the homogeneous alignment layer, before forming an electric field between the counter electrode 12 and the pixel electrode 14, long axes of LC molecules 19 are arranged parallel to the surface of the substrate 10. Also, by the rubbing axis of the homogeneous alignment layer, the orientation direction of the molecules 19 is decided. The R direction in the drawings is the direction of rubbing axis for the homogeneous alignment layer formed on the lower substrate 10.
A first polarizing plate(not shown) is formed on the outer surface of the lower substrate 10 and a second polarizing plate (not shown) is formed on the outer surface of the upper substrate (not shown). Here the first polarizing plate is disposed to make its polarizing axis to be parallel to the P direction of the FIG. 1. That means, the rubbing axis direction R and the polarizing axis direction P are parallel each other. On the other hand, the second polarizing plate is disposed to make its polarizing axis to be parallel to the Q direction which is substantially perpendicular to the polarizing axis of the first polarizing plate.
When a scanning signal is applied to the gate bus line 11 and a display signal is applied to the data bus line 15, the TFT 16 disposed at the intersection of the gate bus line 11 and the data bus line 15 is turned on. Then the display signal of the data bus line 15 is transmitted to the pixel electrode 14 through the TFT 16. Consequently, an electric field E is generated between the counter electrode 12 where a common signal is inputted and the pixel electrode 14. At this time, as the direction of electric field E is referenced as x direction as described in the FIG. 1, it has a predetermined degree of angle with the rubbing axis.
Afterwards, before the electric field is not generated, the long axes of the LC molecules are arranged parallel to the substrate surface and parallel to rubbing direction R. Therefore the light passed through the first polarizing plate and the liquid crystal layer is unable to pass the second polarizing plate, the screen has dark state.
As the electric field is generated, the long axes(or optical axes) are rearranged parallel to the electric field, and therefore the incident light passed through the first polarizing plate and the liquid crystal layer passes the second polarizing plate and the screen has white state.
At that time, the direction of the long axes of the LC molecules as being parallel to the substrate surface becomes changed according to the presence of the electric field.
As well known, the refractive anisotropy (or birefringence, .DELTA.n) is occurred due to the difference of the lengths of the long and the short axes. The refractive anisotropy .DELTA.n is also varied from the observer's viewing directions. Therefore a predetermined color is appeared on the region where the polar angle is of 0 degree and the azimuth angle range of degrees 0, 90, 180 and 270 in spite of the white state. This regards as color shift and more detailed description thereof is attached with reference to the equation 1. EQU T.apprxeq.T.sub.0 sin.sup.2 (2.chi.).multidot.sin.sup.2 (.pi..multidot..DELTA.nd/.lambda.) equation 1
wherein, T: transmittance;
T.sub.0 : transmittance to the reference light; PA1 .chi.: angle between an optical axis of liquid crystal molecule and a polarizing axis of the polarizing plate; PA1 .DELTA.n: birefringence; PA1 d: distance or gap between the upper and lower substrates (thickness of the liquid crystal layer); and PA1 .lambda.: wavelength of the incident light. PA1 a substrate; PA1 a counter electrode formed on the substrate and including a rectangular frame type main electrode and at least one dividing electrode to divide a space surrounded by the main electrode into a plurality of spaces; PA1 a pixel electrode formed on the substrate and including a first electrode traversing some portions of the counter electrode spaces with a first direction and a second electrode which is electrically connected to the first electrode and traversing the rest of the counter electrode spaces with a second direction perpendicular to the first direction; and PA1 an insulating layer which insulates the counter electrode and the pixel electrode from each other. PA1 a liquid crystal layer having a plurality of liquid crystal molecules; PA1 a lower substrate disposed at one side of the liquid crystal layer and having a sub pixel defined by crossing a gate bus line and a data bus line at an interface with said liquid crystal layer, a thin film transistor at each intersection of the gate bus line and the data bus line and a counter and a pixel electrodes for driving the liquid crystal molecules within each sub pixel; PA1 an upper substrate disposed at the other side of the liquid crystal layer and having a color filter; PA1 a first and a second homogeneous alignment layers having rubbing axis of a predetermined direction and interposed between the liquid crystal layer and the lower substrate, and between the liquid crystal layer and the upper substrate; and PA1 a first and a second polarizing plates disposed in the outer surfaces of the lower substrate and the upper substrate respectively; PA1 wherein the counter electrode includes a rectangular fame type main electrode and a dividing electrode to divide a space surrounded by the rectangular frame type main electrode into a plurality of spaces; PA1 wherein the pixel electrode includes a first electrode traversing some spaces of the counter electrode spaces with a direction parallel to the gate bus line and a second electrode which is electrically connected to the first electrode and traversing the rest of the counter electrode spaces with a direction parallel to the data bus line; and PA1 wherein an electric field parallel to the surface of the substrate and the gate bus line and an electric field parallel to the surface of the substrate and the data bus line are simultaneously formed when a voltage is applied to the counter electrode and the pixel electrode. PA1 a liquid crystal display layer having a plurality of LC molecules; PA1 a lower substrate disposed at one side of the liquid crystal layer and having a sub pixel defined by crossing a gate bus line and a data bus line at an interface with said liquid crystal layer and a thin film transistor at each intersection of a counter electrode and a pixel electrode, PA1 wherein the counter electrode and the pixel electrode are provided for driving the LC molecules within each sub pixel; PA1 an upper substrate disposed at the other side of the liquid crystal layer and having a color filter; PA1 a first and a second homogeneous alignment layers having predetermined direction of rubbing axes and interposed between the liquid crystal layer and the lower substrate, and between the liquid crystal layer and the upper substrate; PA1 a first and a second polarizing plates disposed in the outer surfaces of the lower substrate and the upper substrate respectively; and PA1 a phase compensating plate sandwiched between the upper substrate and the second polarizing plate; PA1 wherein the counter electrode includes a rectangular fame type main electrode and a dividing electrode to divide an area surrounded by the rectangular frame type main electrode into a plurality of spaces; PA1 wherein the pixel electrode includes a first electrode traversing some spaces of the counter electrode spaces with a direction parallel to the gate bus line and a second electrode which is electrically connected to the first electrode and traversing the rest of the counter electrode spaces with a direction parallel to the data bus line; and PA1 wherein an electric field parallel to the substrate surface and the gate bus line and another electric field parallel to the data bus line are simultaneously formed when a voltage is applied to the counter electrode and the pixel electrode. PA1 a liquid crystal display layer having a plurality of liquid crystal molecules; PA1 a lower substrate disposed at one side of the liquid crystal layer and having a sub pixel defined by crossing a gate bus line and a data bus line at an interface with said liquid crystal layer and having a thin film transistor at each intersection of the gate bus line and the data bus line, and a counter and a pixel electrodes for driving the liquid crystal molecules within each sub pixel; PA1 an upper substrate disposed at the other side of the liquid crystal layer and having a color filter; PA1 a first and a second homeotropic alignment layers interposed between the liquid crystal layer and the lower substrate, and between the liquid crystal layer and the upper substrate; PA1 a first and a second polarizing plates disposed in the outer surfaces of the lower substrate and the upper substrate respectively; and PA1 a phase compensating plate sandwiched between the upper substrate and the second polarizing plate; PA1 wherein the counter electrode includes a rectangular fame type main electrode and a dividing electrode to divide a space surrounded by the rectangular frame type main electrode into a plurality of spaces; PA1 wherein the pixel electrode includes a first electrode traversing some spaces of the counter electrode spaces with a direction parallel to the gate bus line and a second electrode which is electrically connected to the first electrode and traversing the rest of the counter electrode spaces with a direction parallel to the data bus line; and PA1 wherein an electric field parallel to the surface of the substrate and the gate bus line and an electric field parallel to the data bus line are simultaneously formed when a voltage is applied to the counter electrode and the pixel electrode. PA1 a liquid crystal display layer having a plurality of liquid crystal molecules; PA1 a lower substrate disposed at one side of the liquid crystal layer and having a sub pixel defined by crossing a gate bus line and a data bus line at an interface with said liquid crystal layer and having a thin film transistor at each intersection of the gate bus line and the data bus line, and a counter and a pixel electrodes for driving the liquid crystal molecules within each sub pixel; PA1 an upper substrate disposed at the other side of the liquid crystal layer and having a color filter; PA1 a first and a second alignment layers having predetermined direction of rubbing axis and interposed between the liquid crystal layer and the lower substrate, and between the liquid crystal layer and the upper substrate; and PA1 a first and a second polarizing plates disposed at the outer surfaces of the lower substrate and the upper substrate respectively; PA1 wherein the counter electrode includes a rectangular frame type main electrode and a dividing electrode to divide a space surrounded by the rectangular frame type main electrode into a plurality of spaces; PA1 wherein the pixel electrode includes a first branch traversing some spaces of the counter electrode spaces with a direction parallel to the gate bus line, a second branch which is electrically connected to the first electrode and traversing the rest of the counter electrode spaces with a direction parallel to the data bus line, a third branch which is electrically connected to the first electrode and crossed to one portion of the first branch, said third branch of the pixel electrode parallel to the data bus line is disposed in the center portion of sub pixel; and PA1 wherein an electric field parallel to the surface of the substrate and the gate bus line and an electric field parallel to the data bus line are simultaneously formed when a voltage is applied to the counter electrode and the pixel electrode.
So as to obtain the maximum transmittance T, the .chi. should be .pi./4 or the .DELTA.nd/.lambda. should be .pi./2 according to the equation 1. As the .DELTA.nd varies with the birefringence difference of the LC molecules from viewing directions, the .lambda. value is varied in order to make .DELTA.nd/.lambda. to be .pi./2. According to this condition, the color corresponding to the varied wavelength .lambda. appears.
Accordingly, as the value of An relatively decreases at the viewing directions "a" and "c" toward the short axes of the LC molecules, the wavelength of the incident light for obtaining the maximum transmittance relatively decreases. Consequently a blue color having shorter wavelength than a white color is emerged.
On the other hand, as the value of An relatively increases at the viewing directions "b" and "d" toward the short axes of the LC molecules, the wavelength of incident light relatively increases. Consequently a yellow color having a longer wavelength than the white color is emerged. This causes deterioration to the resolution of IPS-LCDs.